- e -

• e : T1
• e_acc : Last_transformation.RTL
• e_feedback : Transf_round.Naive , Transf_round.Precomputed_UF1 , Transf_round.Reordered_UF1 , Transf_round.Reordered_UF2
• e_hash : Transf_round.Naive
• e_in : Transf_round_comb
• e_iv : Initialisation_block.Reordered_UF2 , Last_transformation.RTL
• e_mux_out : Transf_round.Reordered_UF1 , Transf_round.Reordered_UF2
• e_new : Last_transformation.RTL
• e_out : Transf_round.Naive , Transf_round.Precomputed_UF1 , Transf_round.Reordered_UF1 , Transf_round.Reordered_UF2 , Transf_round_comb
• e_plus1_reg_in : Transf_round.Reordered_UF2
• e_plus1_reg_out : Transf_round.Reordered_UF2
• e_reg_in : Transf_round.Reordered_UF1 , Transf_round.Reordered_UF2
• e_reg_out : Transf_round.Reordered_UF1 , Transf_round.Reordered_UF2
• e_t : Transf_round.Precomputed_UF1
• en : counter , D_ff , Expander_stage , K_ROM , reg , SHA2_core , test_SHA256_power_1A.Testbed , test_SHA256_power_1B.Testbed , test_SHA256_power_2A.Testbed , test_SHA256_power_5A.Testbed , Transf_round , tSHA256_core.Testbench , tSHA256_core_multi.Testbench , tSHA512_core.Testbench
• en_hash : SHA2_core.RTL
• end_major_cycle : Expander_stage , SHA2_core.RTL , Transf_round
• end_major_cycle_init : SHA2_core.RTL
• EXPANDED_WORDS : Expander_stage.RTL
• expander_init : SHA2_Control_Unit
• EXPANDER_PIPELINE_CONNECTION : SHA2_core.RTL
• expander_pipeline_input : SHA2_core.RTL
• expander_pipeline_output : SHA2_core.RTL