K_ROM Entity Reference

Constants ROM. More...

Entities
Behavioural	architecture
	Architecture of the constants ROM. More...

Libraries
ieee
	Standard library.

Use Clauses
std_logic_1164
	Standard 9-values logic library.
math_real
	Standard math library, required for the log function.
numeric_std
	Arithmetic library, included for the unsigned type conversion.
utils	Package <utils>
	Package containing some generalisation functions.

Generics
WORD_WIDTH	natural := 32
	Word width of the circuit.
CYCLES_PER_STAGE	natural := 16
	Clock cycles required to complete a pipeline stage.
UNROLLING_FACTOR	natural := 1
	Number of SHA-256 steps performed by a single round.
STAGE	natural
	Specific pipeline stage for which the ROM must be instantiated.
PREFETCH_STEPS	natural := 0
	Number of steps of the word prefetched from the Constants Unit and the Expander pipeline.

Ports
clk	in std_logic
	Clock of this component.
en	in std_logic
	Enable signal.
address	in std_logic_vector ( bits_to_encode ( CYCLES_PER_STAGE ) downto 0 )
	Word selection signal.
data	out std_logic_vector ( ( UNROLLING_FACTOR * WORD_WIDTH ) - 1 downto 0 )
	Selected word.

Detailed Description

Constants ROM.

The configuration parameters etermine the shape and content of the instantiated ROM

Member Data Documentation

address

address in std_logic_vector ( bits_to_encode ( CYCLES_PER_STAGE ) downto 0 )

Port

Word selection signal.

clk

clk in std_logic

Port

Clock of this component.

CYCLES_PER_STAGE

CYCLES_PER_STAGE natural := 16

Generic

Clock cycles required to complete a pipeline stage.

This is required to set the depth of the ROM

data

data out std_logic_vector ( ( UNROLLING_FACTOR * WORD_WIDTH ) - 1 downto 0 )

Port

Selected word.

en

en in std_logic

Port

Enable signal.

ieee

ieee

Library

Standard library.

math_real

math_real

Package

Standard math library, required for the log function.

numeric_std

numeric_std

Package

Arithmetic library, included for the unsigned type conversion.

PREFETCH_STEPS

PREFETCH_STEPS natural := 0

Generic

Number of steps of the word prefetched from the Constants Unit and the Expander pipeline.

STAGE

STAGE natural

Generic

Specific pipeline stage for which the ROM must be instantiated.

This is required to select the ROM content

std_logic_1164

std_logic_1164

Package

Standard 9-values logic library.

UNROLLING_FACTOR

UNROLLING_FACTOR natural := 1

Generic

Number of SHA-256 steps performed by a single round.

This is required to set the width of the ROM

utils

utils

Package

Package containing some generalisation functions.

WORD_WIDTH

WORD_WIDTH natural := 32

Generic

Word width of the circuit.

The width of the ROM depends also on the UNROLLING_FACTOR