SHA-2 Workbench  1.0
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Naive Architecture Reference

Straightforward implementation of the transformation round. More...

Libraries

shacomps 
 Basic SHA components library.
components 
 Basic integrated circuits components library.

Components

Transf_round_comb  <Entity Transf_round_comb>
 Combinatorial part of the transformation round.

Signals

reg_input  std_logic_vector ( 8 * WORD_WIDTH downto 0 ) := ( others = > ' 0 ' )
 Output of the multiplexer, and input of the compressor pipeline register.
reg_output  std_logic_vector ( 8 * WORD_WIDTH downto 0 ) := ( others = > ' 0 ' )
 Output of the compressor pipeline register.
feedback  std_logic_vector ( 8 * WORD_WIDTH downto 0 ) := ( others = > ' 0 ' )
 Internal output signal, to be used as feedback input.

Instantiations

pipeline_reg  reg <Entity reg>
 Output value of the accumulator \(H\).
compression  Transf_round_comb <Entity Transf_round_comb>
 Compression function.

Aliases

valid_reg   is reg_output ( 8 * WORD_WIDTH )
 Flag of validity for the register.
a_hash   is reg_output ( 8 * WORD_WIDTH - 1 downto 7 * WORD_WIDTH )
 Value of the accumulator \(A\) input to the compressor round.
b_hash   is reg_output ( 7 * WORD_WIDTH - 1 downto 6 * WORD_WIDTH )
 Value of the accumulator \(B\) input to the compressor round.
c_hash   is reg_output ( 6 * WORD_WIDTH - 1 downto 5 * WORD_WIDTH )
 Value of the accumulator \(C\) input to the compressor round.
d_hash   is reg_output ( 5 * WORD_WIDTH - 1 downto 4 * WORD_WIDTH )
 Value of the accumulator \(D\) input to the compressor round.
e_hash   is reg_output ( 4 * WORD_WIDTH - 1 downto 3 * WORD_WIDTH )
 Value of the accumulator \(E\) input to the compressor round.
f_hash   is reg_output ( 3 * WORD_WIDTH - 1 downto 2 * WORD_WIDTH )
 Value of the accumulator \(F\) input to the compressor round.
g_hash   is reg_output ( 2 * WORD_WIDTH - 1 downto WORD_WIDTH )
 Value of the accumulator \(G\) input to the compressor round.
h_hash   is reg_output ( WORD_WIDTH - 1 downto 0 )
 Value of the accumulator \(H\) input to the compressor round.
a_feedback   is feedback ( 8 * WORD_WIDTH - 1 downto 7 * WORD_WIDTH )
 Value of the accumulator \(A\) output from the compressor round.
b_feedback   is feedback ( 7 * WORD_WIDTH - 1 downto 6 * WORD_WIDTH )
 Value of the accumulator \(B\) output from the compressor round.
c_feedback   is feedback ( 6 * WORD_WIDTH - 1 downto 5 * WORD_WIDTH )
 Value of the accumulator \(C\) output from the compressor round.
d_feedback   is feedback ( 5 * WORD_WIDTH - 1 downto 4 * WORD_WIDTH )
 Value of the accumulator \(D\) output from the compressor round.
e_feedback   is feedback ( 4 * WORD_WIDTH - 1 downto 3 * WORD_WIDTH )
 Value of the accumulator \(E\) output from the compressor round.
f_feedback   is feedback ( 3 * WORD_WIDTH - 1 downto 2 * WORD_WIDTH )
 Value of the accumulator \(F\) output from the compressor round.
g_feedback   is feedback ( 2 * WORD_WIDTH - 1 downto WORD_WIDTH )
 Value of the accumulator \(G\) output from the compressor round.
h_feedback   is feedback ( WORD_WIDTH - 1 downto 0 )
 Value of the accumulator \(H\) output from the compressor round.
valid_out   is output ( 8 * WORD_WIDTH )
 Flag of validity for the output register.
a_out   is output ( 8 * WORD_WIDTH - 1 downto 7 * WORD_WIDTH )
 Value of the accumulator \(A\) output from the stage.
b_out   is output ( 7 * WORD_WIDTH - 1 downto 6 * WORD_WIDTH )
 Value of the accumulator \(B\) output from the stage.
c_out   is output ( 6 * WORD_WIDTH - 1 downto 5 * WORD_WIDTH )
 Value of the accumulator \(C\) output from the stage.
d_out   is output ( 5 * WORD_WIDTH - 1 downto 4 * WORD_WIDTH )
 Value of the accumulator \(D\) output from the stage.
e_out   is output ( 4 * WORD_WIDTH - 1 downto 3 * WORD_WIDTH )
 Value of the accumulator \(E\) output from the stage.
f_out   is output ( 3 * WORD_WIDTH - 1 downto 2 * WORD_WIDTH )
 Value of the accumulator \(F\) output from the stage.
g_out   is output ( 2 * WORD_WIDTH - 1 downto WORD_WIDTH )
 Value of the accumulator \(G\) output from the stage.
h_out   is output ( WORD_WIDTH - 1 downto 0 )
 Value of the accumulator \(H\) output from the stage.

Detailed Description

Straightforward implementation of the transformation round.

In this implementation, the pipeline register is placed before all the combinatorial part, which is packed within the Transf_round_comb component.

naive_transf_round.png
Straightforward architecture of the transformation round

Designs focused only on the combinatorial part can be implemented as an architecture for the Transf_round_comb component and exploit this architecture for the Transf_round. Such implementations require FIX_TIME set to false.

Member Data Documentation

◆ a_feedback

a_feedback is feedback ( 8 * WORD_WIDTH - 1 downto 7 * WORD_WIDTH )
Alias

Value of the accumulator \(A\) output from the compressor round.

This temporary signal is employed to perform the feedback

◆ a_hash

a_hash is reg_output ( 8 * WORD_WIDTH - 1 downto 7 * WORD_WIDTH )
Alias

Value of the accumulator \(A\) input to the compressor round.

◆ a_out

a_out is output ( 8 * WORD_WIDTH - 1 downto 7 * WORD_WIDTH )
Alias

Value of the accumulator \(A\) output from the stage.

◆ b_feedback

b_feedback is feedback ( 7 * WORD_WIDTH - 1 downto 6 * WORD_WIDTH )
Alias

Value of the accumulator \(B\) output from the compressor round.

This temporary signal is employed to perform the feedback

◆ b_hash

b_hash is reg_output ( 7 * WORD_WIDTH - 1 downto 6 * WORD_WIDTH )
Alias

Value of the accumulator \(B\) input to the compressor round.

◆ b_out

b_out is output ( 7 * WORD_WIDTH - 1 downto 6 * WORD_WIDTH )
Alias

Value of the accumulator \(B\) output from the stage.

◆ c_feedback

c_feedback is feedback ( 6 * WORD_WIDTH - 1 downto 5 * WORD_WIDTH )
Alias

Value of the accumulator \(C\) output from the compressor round.

This temporary signal is employed to perform the feedback

◆ c_hash

c_hash is reg_output ( 6 * WORD_WIDTH - 1 downto 5 * WORD_WIDTH )
Alias

Value of the accumulator \(C\) input to the compressor round.

◆ c_out

c_out is output ( 6 * WORD_WIDTH - 1 downto 5 * WORD_WIDTH )
Alias

Value of the accumulator \(C\) output from the stage.

◆ components

components
Library

Basic integrated circuits components library.

◆ compression

compression Transf_round_comb
Instantiation

Compression function.

◆ d_feedback

d_feedback is feedback ( 5 * WORD_WIDTH - 1 downto 4 * WORD_WIDTH )
Alias

Value of the accumulator \(D\) output from the compressor round.

This temporary signal is employed to perform the feedback

◆ d_hash

d_hash is reg_output ( 5 * WORD_WIDTH - 1 downto 4 * WORD_WIDTH )
Alias

Value of the accumulator \(D\) input to the compressor round.

◆ d_out

d_out is output ( 5 * WORD_WIDTH - 1 downto 4 * WORD_WIDTH )
Alias

Value of the accumulator \(D\) output from the stage.

◆ e_feedback

e_feedback is feedback ( 4 * WORD_WIDTH - 1 downto 3 * WORD_WIDTH )
Alias

Value of the accumulator \(E\) output from the compressor round.

This temporary signal is employed to perform the feedback

◆ e_hash

e_hash is reg_output ( 4 * WORD_WIDTH - 1 downto 3 * WORD_WIDTH )
Alias

Value of the accumulator \(E\) input to the compressor round.

◆ e_out

e_out is output ( 4 * WORD_WIDTH - 1 downto 3 * WORD_WIDTH )
Alias

Value of the accumulator \(E\) output from the stage.

◆ f_feedback

f_feedback is feedback ( 3 * WORD_WIDTH - 1 downto 2 * WORD_WIDTH )
Alias

Value of the accumulator \(F\) output from the compressor round.

This temporary signal is employed to perform the feedback

◆ f_hash

f_hash is reg_output ( 3 * WORD_WIDTH - 1 downto 2 * WORD_WIDTH )
Alias

Value of the accumulator \(F\) input to the compressor round.

◆ f_out

f_out is output ( 3 * WORD_WIDTH - 1 downto 2 * WORD_WIDTH )
Alias

Value of the accumulator \(F\) output from the stage.

◆ feedback

feedback std_logic_vector ( 8 * WORD_WIDTH downto 0 ) := ( others = > ' 0 ' )
Signal

Internal output signal, to be used as feedback input.

◆ g_feedback

g_feedback is feedback ( 2 * WORD_WIDTH - 1 downto WORD_WIDTH )
Alias

Value of the accumulator \(G\) output from the compressor round.

This temporary signal is employed to perform the feedback

◆ g_hash

g_hash is reg_output ( 2 * WORD_WIDTH - 1 downto WORD_WIDTH )
Alias

Value of the accumulator \(G\) input to the compressor round.

◆ g_out

g_out is output ( 2 * WORD_WIDTH - 1 downto WORD_WIDTH )
Alias

Value of the accumulator \(G\) output from the stage.

◆ h_feedback

h_feedback is feedback ( WORD_WIDTH - 1 downto 0 )
Alias

Value of the accumulator \(H\) output from the compressor round.

This temporary signal is employed to perform the feedback

◆ h_hash

h_hash is reg_output ( WORD_WIDTH - 1 downto 0 )
Alias

Value of the accumulator \(H\) input to the compressor round.

◆ h_out

h_out is output ( WORD_WIDTH - 1 downto 0 )
Alias

Value of the accumulator \(H\) output from the stage.

◆ pipeline_reg

pipeline_reg reg
Instantiation

Output value of the accumulator \(H\).

Pipeline register of the compressor pipeline

It works also as working register

◆ reg_input

reg_input std_logic_vector ( 8 * WORD_WIDTH downto 0 ) := ( others = > ' 0 ' )
Signal

Output of the multiplexer, and input of the compressor pipeline register.

◆ reg_output

reg_output std_logic_vector ( 8 * WORD_WIDTH downto 0 ) := ( others = > ' 0 ' )
Signal

Output of the compressor pipeline register.

◆ shacomps

shacomps
Library

Basic SHA components library.

◆ Transf_round_comb

Transf_round_comb
Component

Combinatorial part of the transformation round.

◆ valid_out

valid_out is output ( 8 * WORD_WIDTH )
Alias

Flag of validity for the output register.

◆ valid_reg

valid_reg is reg_output ( 8 * WORD_WIDTH )
Alias

Flag of validity for the register.