- f -

• f : T1 , Transf_round_comb.Unrolled
• f_acc : Last_transformation.RTL
• f_feedback : Transf_round.Naive , Transf_round.Precomputed_UF1 , Transf_round.Reordered_UF1 , Transf_round.Reordered_UF2
• f_hash : Transf_round.Naive
• f_in : Transf_round_comb
• f_iv : Initialisation_block.Reordered_UF2 , Last_transformation.RTL
• f_mux_out : Transf_round.Reordered_UF1 , Transf_round.Reordered_UF2
• f_new : Last_transformation.RTL
• f_out : Transf_round.Naive , Transf_round.Precomputed_UF1 , Transf_round.Reordered_UF1 , Transf_round.Reordered_UF2 , Transf_round_comb
• f_reg_in : Transf_round.Reordered_UF1 , Transf_round.Reordered_UF2
• f_reg_out : Transf_round.Reordered_UF1 , Transf_round.Reordered_UF2
• f_t : Transf_round.Precomputed_UF1
• feedback : Transf_round.Naive , Transf_round.Precomputed_UF1 , Transf_round.Reordered_UF1 , Transf_round.Reordered_UF2
• FINAL_SUM_AS_STAGE : SHA2_core
• first_major_cycle : SHA2_Control_Unit , SHA2_core.RTL
• FIX_TIME : SHA2_core
• flush_completed : SHA2_core.RTL
• FULLY_PIPELINED : test_SHA256_power_1A , test_SHA256_power_1B , test_SHA256_power_2A , test_SHA256_power_5A