Initialisation_block Entity Reference

Initialisation block for the Compressor pipeline. More...

Entities
Reordered_UF2	architecture
	Initialisation block for the Reordered_UF2 architecture of the transformation round block. More...

Libraries
ieee
	Standard library.

Use Clauses
std_logic_1164
	Standard 9-values logic library.

Generics
WORD_WIDTH	natural := 32
	Width of the words of the Compressor.
WORDS	natural := 1
	Number of words for which to provide initialisation values.
UNROLLING_FACTOR	natural := 1
	Number of SHA-256 steps performed by a single round.
PREFETCH_STEPS	natural := 2
	Number of steps of the word prefetched from the Constants Unit and the Expander pipeline.

Ports
iv	in std_logic_vector ( 8 * WORD_WIDTH - 1 downto 0 )
	Standard initialisation vector.
K	in std_logic_vector ( ( PREFETCH_STEPS * UNROLLING_FACTOR * WORD_WIDTH ) - 1 downto 0 )
	Constant \(K\) words.
W	in std_logic_vector ( ( PREFETCH_STEPS * UNROLLING_FACTOR * WORD_WIDTH ) - 1 downto 0 )
	Expanded words for the current steps.
additional_iv	out std_logic_vector ( WORDS * WORD_WIDTH - 1 downto 0 )
	Additional initialisation values.

Detailed Description

Initialisation block for the Compressor pipeline.

This component provides additional initialisation values for the Compressor pipeline, apart from the initialisation values provided by the standard, if required by the transformation round block.

An architecture for this entity must be provided by implementations of the transformation round block implementing system-level data prefetching, i.e. PREFETCH_ROUNDS greater than 0

Member Data Documentation

additional_iv

additional_iv out std_logic_vector ( WORDS * WORD_WIDTH - 1 downto 0 )

Port

Additional initialisation values.

ieee

ieee

Library

Standard library.

iv

iv in std_logic_vector ( 8 * WORD_WIDTH - 1 downto 0 )

Port

Standard initialisation vector.

K

K in std_logic_vector ( ( PREFETCH_STEPS * UNROLLING_FACTOR * WORD_WIDTH ) - 1 downto 0 )

Port

Constant \(K\) words.

PREFETCH_STEPS

PREFETCH_STEPS natural := 2

Generic

Number of steps of the word prefetched from the Constants Unit and the Expander pipeline.

std_logic_1164

std_logic_1164

Package

Standard 9-values logic library.

UNROLLING_FACTOR

UNROLLING_FACTOR natural := 1

Generic

Number of SHA-256 steps performed by a single round.

W

W in std_logic_vector ( ( PREFETCH_STEPS * UNROLLING_FACTOR * WORD_WIDTH ) - 1 downto 0 )

Port

Expanded words for the current steps.

WORD_WIDTH

WORD_WIDTH natural := 32

Generic

Width of the words of the Compressor.

WORDS

WORDS natural := 1

Generic

Number of words for which to provide initialisation values.