SHA-2 Workbench  1.0
RTL Architecture Reference

Architecture of the RC adder. More...

Signals

c_internal  std_logic_vector ( width downto 0 ) := ( others = > ' 0 ' )
 Carry signal vector, used for chaining.

Instantiations

full_adder_i  full_adder <Entity full_adder>
 Each one of the full adder of the RC adder.

Detailed Description

Architecture of the RC adder.

Member Data Documentation

◆ c_internal

c_internal std_logic_vector ( width downto 0 ) := ( others = > ' 0 ' )
Signal

Carry signal vector, used for chaining.

◆ full_adder_i

full_adder_i full_adder
Instantiation

Each one of the full adder of the RC adder.